Regis Santonja
Verification Leader, Freescale Semiconductors
International Team Lead & Project Management
- Multi-cultural context (US, Europe, India)
- Organize tasks and plannings, priorities, dependencies
- Identify blocking situations and coordinate actions
- Several projects in parallel
- Weekly multi-site team conference calls
- Reporting
- Project Management Certification at Corphis (Munich)
International Experience
- California : 9 months
- Germany : 9 months
- Italy : 3 months
- Spain : 2 months
Personal Qualities
- Rigorous and Methodical
- Enthusiast
- Team spirit
- Open and direct communication
- Customer focussed
- Ethical
- Adaptability (to pople, priorities, procedures, environment,...)
Innovation
- Several Technical Awards at Motorola
- Involved in several patents
Mixed-signal IC verification
- Complex Power-Management, Audio and User interface IC (1+ million components)
- Topcell functional simulation
- Topcell current consumption simulations
Technical Lead and digital design
- Baseband LPGA for automotive radio networking (CS Route)
- Digital ASIC for an ATM switch/router for Matra Ericsson Telecom (MET)
- Technical customer interface
- Digital ASIC for Interactive VoD (Video On Demand) - ALCATEL
- Design For Test expert (JTAG, scan)
58 contactsInternational Team Lead
- Multi-cultural contact (USA, Europe, India)
- 5 to 10 people
- Organize tasks and plannings, priorities, dependencies
- Weekly multi-site team conference calls to review progresses, issues, risks
- Weekly reporting
- Bug & fixes follow-up
- Drive cross-functional team to elaborate company's best-class standards in Verification methodology
Development
- Defined and developped a complete set of mixed-signal verification IPs using Verilog-AMS
- Developped original tool to track functional coverage
- Complex mixed-signal ICs (~1 million components)
+ Power-management (LDOs, Switchers, charger, power gating, ...)
+ Audio converters (sigma-delta, voice/stereo HiFi), I2s digital interface
+ Real Time Clock with wake-up alarms
+ User interfaces (USB 2.0 OTG, RGD LEDs, ...)
1999 - 2003- Global IC control logic
- Digital filters for audio Codec (13 bits mono-bit sigma-delta)
- Digital Filters for Stereo DAC HiFI (16 bits, 4 bits sigma-delta)
- Development of serial architecture to reduce power consumption of digital filters
- Place & route
- Timing closure
- Customer technical interface
1998 - 1998- Re-design of a digital baseband processor (LPGA at Chip Express) for automobile radio networking (automatic highway tolls)
- Coordinated design changes and verification
- Analyzed and fixed very tricky killer bug causing frame losses ( > 1 per million).
- Ran and documented complete verification plan, non-regression tests
- Today in mass production and present in anyone's car in France
1997 - 1997- Organized conference calls between European, Japanese and US teams to fix backend, manufacturing, test and failure analysis issues.
- Identify blocking situations and coordinate actions
- 5 to 10 projects in parallel
- Daily reporting
1997 - 1997- 3 months mission to help Milan's Design Center
- High priority / short planning project
- Inserted scan and JTAG logic
- Generated test patterns
1996 - 1997- Digital design of an ATM switch/router ASIC for Matra Ericsson Telecom
- Technical customer interface
- Monthly progress/issues customer meetings
1995 - 1996- Digital design of an FTTC (Fiber To The Curb) ASIC for Interactive Video On Demand (VoD) services on twisted pair cables for ALCATEL
- ATM frames re-formatting (capture, scrambling, Reed Solomon) + datapath control.
- Effective team work in a foreign country
- Won technical respect as a new digital engineer
1994 - 1995- Technical support of customer's ASIC design.
- Ensuring best design and testability practices are met before sign off.