Christophe Cortemiglia

Christophe Cortemiglia

System Software and Silicon Validation Engineer

Antibes, France

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Son parcours

  • Aujourd'hui
    Avril 2015

    Pre and Post Silicon Validation Engineer

    +5000 employés

    -> Low Level Software and Kernel Drivers Developments for USB Silicon Validation on Modem Platforms
    -> Validation on Physical Board
    -> Validation on Pre-Silicon FPGA (Veloce)
    -> Plan Definition, Reviews and Schedule Definition
    -> High Cooperation with Chinese, German and US Teams
  • Aujourd'hui
    Mars 2015
    Août 2013

    System and Silicon Validation Engineer

    +5000 employés

    Verification and Validation on Samsung LSI Exynos Products.

    -> Software Functional Drivers Implementation
    -> Validation on Board and on FPGA Platforms (HAPS ans ZeBu)
    -> Plan Definition, Reviews and Schedule Definition
    -> System Verilog RTL Pre-Silicon Verification
    -> Expertise on standards for JPEG, Security
  • Aujourd'hui
    Août 2013
    Novembre 2012

    SATA Software Development, Validation and Debug on OMAP5 platform

    +5000 employés

    -> Software Functional Drivers Implementation
    -> Validation on Board
    -> Plan Definition, Reviews and Schedule Definition
    -> Expertise on standards for SATA (ATA, ATAPI)
  • Aujourd'hui
    Novembre 2012
    Février 2009

    USB3 and USB2 Software Development, Validation and Debug on OMAP5 and OMAP4 platforms

    +5000 employés

    -> Software Functional Drivers Implementation
    -> Validation on Board
    -> Plan Definition, Reviews and Schedule Definition
    -> Expertise on standards for USB3.0, Device and Host (xHCI)
    -> Expertise on standards for USB2.0, OTG1.3, ULPI, UTMI, EHCI, OHCI
    -> Super Speed Electrical Certification (Eye Diagram, Spread Spectrum Clocking…)
    -> High Speed Electrical Certification (Eye Diagram, Golden Tree…)
    -> Power and Performances Tests and Analysis
    -> Work with SW people to integrate patches in Android Release
    -> Notions of PCI Express (For Pre-Silicon Study for another platform)
  • Aujourd'hui
    Février 2009
    Novembre 2006

    Functional Validation on Modem Devices

    +5000 employés

    Software Functional Drivers, Validation on Board, Plans Definition, reviews and schedule definition for several features like:
    -> Memory Interfaces (DDR, SDRC, NAND)
    -> USIM, 3G Topics (Notions of HSPA and WCDMA)
    -> Power Management
    -> I2C, SPI, Boot Secure, DMA.
    -> Tests Automation
  • Aujourd'hui
    Novembre 2006
    Juin 2002

    Design Verification and SW Validation on Modem Devices

    +5000 employés

    Design Functional Verification (RTL and GATE Simulations), Validation on Board, Plans Definition, for several features like:
    -> UART/IrDA and Basic Serial Interfaces
    -> DSP C64xx
  • Aujourd'hui
    Juin 2002
    Novembre 2001

    Specification Reviewer for OMAP1610 Modules

    +5000 employés

    Contractor via STUDIEL Company

    -> Within the OMAP Architecture Division
    -> Technical Specifications Reviewer OMAP Modules delivered by Architects like
    DMA, Memory Interfaces, GPIO …
  • Aujourd'hui
    Novembre 2001
    Novembre 2000

    Microelectronic Engineer

    +5000 employés

    Contractor via ASTEK Company

    -> Within the IBM Microelectronic Division
    -> Design and Verify IPs components for Data Packet Routing (UDASL switch).
    -> Implement Robustness and Stress Tests
    -> Put in place Automation and Optimization Tests
  • Aujourd'hui
    Novembre 2000
    Janvier 2000

    Software Engineer

    Secure Tests for Military Plane RAFALE F1 for DASSAULT AVIATION

    -> Within the Avionic Division
    -> Software Implementation for Display Attack for Aircraft Touch Screen
    -> Tests Specifications Definition and Validation (“V-Cycle”),
    -> Real Time Tests on Simulation Platform (Power PC)
    -> "Confidentialité Defense” Ability
  • Aujourd'hui
    Juin 1999
    Janvier 1999

    Engineer School Internship

    I3S laboratory (Sciences University of Nice)

    Vector Quantization for Satellite Image Processing (Wavelet Transform)

    -> Collaboration with CNES (Centre National d’Études Spatiales)
    -> Develop Best Image Compression for the 3S2 satellite
    -> Compare Study between Scalar Quantization to Vector Quantization.
  • Université Nice Sophia Antipolis

    Digital Signal Processing

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Ses langues parlées

  • Français
    ****Langue maternelle
  • Anglais

    Ses centres d'intérêt


    Sa présentation

    • 15+ years of experience driving large scale Low Level SW projects in an international environment
    • Expert in Validation, Debug , Analysis and Reporting with excellent C coding skills
    • Linux Kernel development Drivers (USB)
    • Permanently pushing for efficiency and innovation, successfully deployed novel methodologies
    • Strong Low Level SW background for the semiconductor industry
    • Good communication skills and team spirit with ability to work in multi-cultural environments

    Languages and SW Environments:
    • C
    • ARM Assembler (32 and 64 Bits)
    • System Verilog
    • Clearcase, ICM
    • UNIX, LSF
    • Linux Basic Knowledge, TCL, Perl

    FPGA Pre-Silicon Prototyping:
    • Zebu (Synopsys)
    • HAPS (Synopsys)
    • Virtual Prototyping (Synopsys)
    • Veloce (Mentor Graphics)

    Debug Tools:
    • Lauterbach
    • Code Composer Studio

    Pre-Silicon Tools
    • NCSIM
    • Modelsim

    Laboratory Tools:
    • Tektronix DPO/TDS Scopes and AWG Data Generator
    • Agilent MSO Scopes

    Protocols Analyzers:
    • USB Lecroy Voyager/Advisor
    • USB Beagle 5000
    • SATA Bus Doctor

    Multi-Cultural Frame Work
    • Work with Korean Teams
    • Work with Chinese Teams
    • Work with US/India Teams
    • 2 months in San Diego (CA)
    • Customers Support

    Son activité sur Viadeo

    Ses derniers contacts
    Claude Marescot
    Erwan Simon
    Herve Babey
    • Directeur, Gestion de domaines et IP strategiques, Texas Instruments
    Lionel Dahyot
    • Ingénieur d'études & développement de circuits intégrés, Sondrel

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