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Bouygues Telecom
- Ingénieur Télécommunication
Meudon
2015 - maintenant
WiFi
Modem
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NXP Semiconductors
- System&Application engineer
Colombelles
2001 - maintenant
Philips Semiconductors Caen / NXP Semiconductors Caen
Development SoC MPEG 2/4 for Digital Receiver, Set-top Box, Digital TV and PVR recorder
* Technical environment
* MPEG2/MPEG4
* CPU MIPS 32
* RTOS: PSOS / Ecos
* Languages:
C
* CAD: OrCad, Protel, Mentor graphics ;
* Debugging tools : Pathfinder (Ashling), Vision Click (Wind River) ;
* CM tools : CM Synergy, Change Synergy ;
* Generating the Cabot OAD(Over-Air-Download) stream ;
* Standards : MPEG2, MPEG4, JPEG, DVB-T, DVB-S, DVB-C ;
* Activities(Digital Set-top box/DTV)
* Architecture HW reference design board ;
* Definition of Set-top box board schematic and layout (4 layers) ;
* Power(5V, 3V3, 1V2, 1V8, 12V)
* SDRAM, DDR, Flash, I2C, EEPROM
* FPGA
* Video switch, Audio ADC
* HDMI
* Ethernet.
* RS232
* HDD
* Smart Card
* HW application notes ;
* Tuner/Channel decoder reference board design ;
* Definition of DVB-T stream capture board schematic and layout (2 layers) ;
* Power(5V, 3V3, 1V2, 1V8,)
* DVB-ASI
* USB, I2C(400MHz)
* MPEG 2/4 stream capture
* HW board validation
* DDR/SDRAM clock 133MHz
* USB stream capture
* Ethernet Network
* EEPROM
* Load Flash for application bin. file ;
* Power supply (3V3, 1V2, 5V, 12V, 1V8, 2V5, 24V) ;
* Smart Card reader (common interface for Irdeto) ;
* BOM, GERBER
* SW validation and verification
* DTG MHEG open TV
* UK Cabot ;
* Generating the Cabot OAD(Over-Air-Download) stream ;
* Field test with customer (UK, German, Paris, etc.) ;
* Customer support(Design In)
* Korea: Samsung, Humax, LG ;
* China: Haier, CVT, Dale, Metronics, TeleVideo ;
* EU: Iwedia, Servimat
* Customer delivery for Cabot OAD stream ;
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NXP Semiconductors
- Senior System&Application engineer
Colombelles
2001 - maintenant
Philips Semiconductors Caen / NXP Semiconductors Caen
Development RF tuner IC for IRD satellite, terrestrial and cable
* Technical environment
* VBA(measurement auto test tool)
* CAD: OrCad, Protel
* Activities(RF analog/digital)
* Architecture HW reference design board ;
* Definition of RF test board schematic and layout (2 layers) ;
* Single, dual, triple and quad tuners boards
* Power(5V, 3V3, 1V2, 1V8), I2C, USB, S-video
* RF filter and CB trap
* HW validation test tool
* HW application notes
* BOM, GERBER
* RF tuner measurement
* VBA auto test tools ;
* DVB-T (DTG, NorDig, ISDBT, RF sensibility, C/N, max input power level, ACI) ;
* Analog (PAL, SECAM, SNR vs Frequency, Spurious CVBS) ;
* RF antenna leakage
* RF measurement ;
* DVB-T/C, ISDBT, DTG, Nordig, Analog PAL, SECAM, NTSC ;
* Application notes
* Customer support (Design In)
* Korea, Japan, China ;
* Customer delivery for application note and schematic ;
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NXP Semiconductors
- Ingenieur S&A electronique
Colombelles
2001 - maintenant
Microélectronique
RF silicon tuner
MPEG décodeur
-
NXP Semiconductors
- Senior ingenieur S&A electronique
Colombelles
2001 - maintenant
RF silicon tuner
TNT Décodeur
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SCM Microsystems
- DTV HW Designer
2000 - 2001
Development of IRD Via Access module for satellite and cable (EuroCam)
* Technical environment
* DVB common interface, conditional access ;
* PCMCIA type II ADM(Audio Description Module) ;
* Audio decoder
* PCMCIA type II
* POD
* CAD: OrCad, Mentor graphics ;
* Activities(Via Access, EuroCam, PCMCIA type II ADM) ;
* ADM Architecture HW reference board design ;
* Definition of ADM board schematic and layout (4 layers) ;
* Audio decoder IC
* FPGA(MPEG TS input)
* Power(5V, 3V3,)
* PCMCIA connect
* IR
* ADM HW validation
* Power and Audio
* PCMCIA plug
* SMART CARD Reader
* BOM, GERBER
* ViaAccess (EuroCAM, POD) validations
* Canal plus (audio/video clair/Crypte)
* Validation report ;
* Validation Test Script ;
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Daewoo
- DTV HW Designer
Roissy-en-France
1996 - 2000
DEREC France Metz (Daewoo Electronics REsearch Center in
Development of IRD for satellite receiver with ST omega platform
* Technical environment
* DVB IRD satellite
* OFDM demodulator
* HDD time shifting
* DVB EPG
* CAD: OrCad, Mentor graphics
* Activities(IRD satellite receiver) ;
* IRD satellite Receiver architecture HW prototype board design ;
* Definition of IRD satellite receiver board schematic and layout (4 layers) ;
* Power supply (12V, 5V, 3V3, 24V)
* SDRAM, Flash
* Audio DAC
* AV switch
* HDD time shifting
* IR
* Smart card reader
* RF tuner and channel decoder
* HW validation
* Power
* Load Flash, EEPROM
* Audio/Video noise
* SMART CARD Reader
* HDD time shifting
* BOM, GERBER
* OFDM demodulator(DVB satellite front-end)
* Simulation
* FPGA design
* JAVA EPG
* DVB-SI implementation of JAVA EPG ;
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AZTEC System
- HW Research Engineer
1991 - 1993
Development of TELEPHONE TERMINAL(multi memory IC card telephone terminal interface)
* Technical environment
* DSP programming Z8x series, Intel 87xx
* MODEM
* LCD back light
* CAD: OrCad
* Activities(Telephone terminal)
* Architecture HW prototype board design ;
* Definition of HW board schematic and layout (4 layers) ;
* Power supply (12V, 5V, 3V3, 24V)
* Memory IC card slot
* MSR smart card reader board
* Modem
* 4'' LCD back light
* Key PAD
* HW validation and debug
* Power supply
* Memory IC card plug in Plug
* Modem connection
* MSR smart card reader
* BOM, GERBER ;
