Jerome Meunier

Timing System Specification Team (TSS) - 2.5 Years, Nice, France
Subcontractor - Altran Technologies,

- OMAP IO Buffer SPICE Simulation for Signal Integrity and system topology concerns

- OMAPV2320 SDR-DDR IF Budget Timing Verification and SPICE Simulation

- Wireless System study (Timing/Electrical investigation of supportable peripherals)

- Defined IC/STA (Static Timing Analysis), Package and PCB Timing Budget (ASIC Wireless Chip) Interface: TRACE, ETM, DIGRF 2.5G/3G IF, CAMERA (CPI, CSI2)

- Coordinated TSS tools development (Excel – VBA), CC-CQ and Library process creation

- Performed Open Multimedia Application Processor (OMAP)’s Data Manual L2 Support

- Managed Documentation of OMAPV1230-V2230-2430 Datasheet Development

7 months Internship with Verification and Validation Team

Development of an FPGA-based Automatic Measurement Station for Silicon Validation

- FPGA-VHDL Development of Station’s peripherals including a switch and frequency meter

- Verified and validated on Test Board (VIRTEX2 6000, ASM, C) in laboratory

- Developed, verified and validated C library/drivers to control measurement station

6 months internship with Microelectronic Team

Development of Analog test bench to estimate ADC radiation resistance (SEU)

- Developed a LabView user-friendly interface to manage test pattern generation/record

- Designed PCB and Modified VHDL code for automation purpose

- Performed Real condition test beam campaign at GANIL (Caen, France)