Nicolas Roux

Imaging processing ASIC system-on-chip architect (Imaging division STMicroelectronics)
juillet 2005 – Poste actuel (5 ans 6 mois)

• Team leader of Image signal chain specification for mobile and DSC camera processors.
• Project leader of camera algorithm chains for STEricsson mobile basebands, system-on-chip for Smartphones.
• Project leader of image processing an EDOF camera module.
• Project leader of Wide Dynamic Range on a mobile phone imaging processor.
• Leader of image processing algorithm developments for video streaming (5 patents)
• Modular software platform for accurate modelling of image processing chains (Python and C++ based)
• Project leader of a real time imaging processing Fpga platform.
• Image quality assessment expert
• DSC market survey
• Photo lab / dark room responsible

Low power system architect (Imaging Division STMicroelectronics)
janvier 2005 – juillet 2005 (7 mois)

Leader of the Imaging division strategy for low power solutions.
• Interface with CAD tool vendors. Assessment of tools.
• Participation to ST low power workgroup.
• Development plan for the low power flow.
• Interface with LP flow team in Sicily.

FPGA prototyping and ASIC product validation leader (Imaging Division ST Microelectronics)
janvier 2002 – décembre 2004 (3 ans)

Stv0705 system-on-chip for digital still camera:
• Project leader of product validation.
• Lead validation discussions with the customer (Olympus) and development teams.
• Specification and development plan for fpga based prototyping platforms.
• Responsible of technology choices.
• Responsible of the validation strategy: sub-systems and full product (9 Xilinx Virtex 8000)

Stv0684 system-on-chip for digital still camera:
• Project leader of product validation.
• Lead validation platform developments, based on fpga.
• Lead a team of 4 people over 3 international sites.
• Development of the fpga prototypes, including design adaptations.
• Development of software diagnostics and bring-up boards.

Platform competence centre,
• Participation of competence centre strategies. Fpga platforms, boards, CAD tools, prototyping platforms, discussion with solution providers.
• Specification and development of ASIC functional bloc managing I2S, SPI, AC97 interfaces.

Marketing of STPC products (New Venture Group STMicroelectronics)
avril 2002 – décembre 2002 (9 mois)

• Product marketing, market survey.
• Product promotion and analysis of customer needs
• Partnership with other ST product divisions to propose a complete solution.
• Participate to product definition.

STPC System solutions and application engineer (New Venture Group STMicroelectronics)
janvier 1998 – mars 2002 (4 ans 3 mois)

Project leader of product validations,
• Responsible of test plans, for validation of STPC in the targeted system.
• Specification and development of validation boards.
• Specifications and development of post-silicon validation boards.
• Responsible of product characterization in application.
- Specification and setup methods.
- Specification and development of specific test boards

System solution competence centre,
• Responsible of 4 master’s degree trainee, 6 months each.
• Project leader of 10 electronic board, specifications and schematics, up to 12 layers, 300x300mm.
• Leading subcontracting of boards place&route and manufacturing. Quotations, supplies, workflow schedule, driving electrical and mechanical constraints.
• Audit of board sub-contractors. Specification and setup of methods
• Project leader of a centralized system for electronic board development: from schematic to subcontractor. Automatic data exchange with board subcontractors, maximizing re-use and data sharing.
• Investment survey of tools: Specctraquest, logic analyzers, bus emulator/generators…
• Setup of SpecctraQuest digital high speed board simulation.
• Development of software diagnostics in C, with automation interface. UIDE, floppy, DMA, PCI, I2C, SPI,...
• C and assembly libraries for code reuse over different u