Senior Program Manager, Samsung Electronics

En poste chez Samsung Electronics

Précédents : TEXAS INSTRUMENTS, Texas Instruments, TranSwitch Corporation


Précédents : PMI® Project Management Institute, Ecole Polytechnique Fédérale De Lausanne (EPFL), Chimie Physique Electronique De Lyon


    En résumé

    Responsible for the overall development of complex and high quality integrated circuits from specification to production. This role includes managing projects with teams located on different countries for a more efficient execution in terms of schedule, quality and cost, resolving technical challenges (several power/voltage domains, multiple clocks domains…) and ensuring best IP, SOC, EDA, product engineering, and technology team collaborations.


Senior Program Manager

Chez Samsung Electronics

De août 2013 à aujourd'hui
Responsible for the supervision of complex and high quality integrated circuits’ development from specification to production. This role includes managing large scale programs in multi functional areas in order to greatly exceed performance and delivery expectations.

OMAP543x Design Manager


De octobre 2009 à août 2013
OMAP5430 and OMAP5432 chips arefully functional and currently in the initial phase of production. I am responsible for the OMAP543x project development by - Defining project scope and support product definition based on different analyses (cost estimation, “What if” scenarios, risk managements ...
Lire la suite

SOC Design Leader

Chez Texas Instruments

De janvier 2005 à octobre 2009
Lead the IC development on several OMAPx products and 2G, 2.5G and 3G Modem by: - Driving the design team (up 35 people based in France & Serbia) from specification to production: RTL integration, DFT, Synthesis, STA, Place & Route, Physical Design (GDSII creation) Power optimization, Database ...
Lire la suite

Timing Closure Lead

Chez Texas Instruments

De janvier 2003 à décembre 2004
Responsible for Static Timing Analysis and the timing closure phase of 2 OMAP ICs (OMAP1610 and OMAP1710) Leader of a team of 4 people

System on Chip Designer (spec, coding, verification)

Chez TranSwitch Corporation

De janvier 2001 à décembre 2002
In shelton Connecticut (USA), I Worked on : - Ensuring best in class quality of Ethernet / SONET chips (130nm) by Formal verification (Vera) - Ensuring best in class quality of ATM chips (Posphy & Ethernet devices) by Design verification - Specifying, designing and verifying a “mailbox” ...
Lire la suite

IC Design &Verification Engineer

Chez TranSwitch Corporation

De juin 1999 à décembre 2000
In Lausanne (Switzerland), I worked on - Verifying a QT1Framer and DS0/DS1 cross connect chip by using C++ & modelsim (API). - Specifying, designing and verifying IPs using Posphy, Utopia transfert protocols.


  • Chef de projet
  • Electronique
  • Mobile
  • Téléphonie
  • Téléphonie mobile