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Vincent REGNAULD

Colombelles

En résumé

RF & MIXED-SIGNAL DESIGN ENGINEER
RF & MIXED-SIGNAL CAD/FLOW ENGINEER

Mid-term career goal: Hold a challenging engineering position in a dynamic environment, which enables me to expand my area of expertise and gives me higher level responsibilities

Short summary: I started my career by discovering a wide range of competences needed to develop an analog/RF chip, and developed a tools expertise as well as basic knowledge on the field of digital circuit development. I had to improve my communication skills and worked in a customer oriented environment.
I then decided to hold a position in a business line to be closer from the product creation. I then focused on back-end skills, then validation, verification and design skills in various RF-CMOS technology projects, including sub-micron technologies up to 45 nm.
I am now expanding my design skills in the Internet of Things field.

Mes compétences :
Circuits intégrés analogiques/RF et mixtes en tech
Cadence
Virtuoso
Assura / PVS
Skill/Ocean
CAN/CNA
Microélectronique
VBA
VHDL FPGA et Matlab

Entreprises

  • NXP Semiconductors - Design engineer

    Colombelles 2006 - maintenant Design activities:
    • Floorplan and isolation strategy: digital cable TV applications product in 65nm CMOS
    • Design improvements on a swiched-mode PA for Automotive Sub-GHz ISM bands application
    • Technology transfer of a Zigbee (IEEE 802.15.4) product : linear 2.4 GHz PA, voltage regulators, VCO calibration
    • Study of feedback DAC current sources for a high-speed ADC application in RF-CMOS 65 nm technology

    Lab activities:
    • Evaluation of a switched-mode PA for Automotive application
    • Evaluation and tuning of a RF 2.4 GHz linear PA for Zigbee applications

    Validation and Verification activities:
    • Analog & Mixed-signal verification: Validation of Digital and Analog PLLs, simulation of digital gates and analog blocks modeled in VHDL (power checks, test & debug modes, functional operation)

    Design flow expertise:
    • 65 nm RF-CMOS flow training and support to University partners
    • Interface between design and CAD services, including external fab partners, on PDK and design tools for RF-CMOS

    Back-end activities:
    • Back-end leader for 180 nm RF-CMOS TV product : Layout engineer, database and PDK management, interface between fab partner and design team
    • Back-end and final assembly for 90nm and 65nm RF-CMOS testchips: First NXP mobile applications testchip, Digital PLL, LNA for digital cable TV applications
  • Philips Semiconductors - Tools and Methodology engineer

    Suresnes 2004 - 2006 Design methodology:
    • Design check-lists maintenance and improvements
    • Analog/RF design flow improvements in close cooperation with CAD and Corporate IT services
    • Basic digital front-end and back-end design flow know-how
    • On time deliveries in a customer-oriented environment

    Tools expertise:
    • Development of front-end and back-end utilities on Cadence platform
    • Technical trainings and presentations given in several NXP sites
  • NXP Semiconductors - Ingénieur développement

    Colombelles 2004 - maintenant

Formations

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