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Texas Instruments
- Digital SubChips Integration
Villeneuve-Loubet
2008 - maintenant
In charge of digital filters integration for baseband devices: model delivery, integration of VHDL modules, functional simulations.
In charge of Audio Sub-System IPs : RTL integration, synthesis and verification support; ensure module delivery.
ECO implementation, LEC, and integration of complete digital DB into analog environment (Cadence DB)
In charge of Digital SubChip integration for Power Management devices : RTL integration, interface with analog IPs definition, ECO implementation for design issues or late customer change requests, LEC, verification support and integration of complete digital DB into analog environment (Cadence DB)
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Texas Instruments
- Digital IP design engineer (Power Management)
Villeneuve-Loubet
2006 - maintenant
In charge of digital Power Management from specification to production : participate to specification with customer, architecture definition, implementation, verification support, silicon validation (design issues follow up, design fix implementation -ECO- and validation) and customer support.
In charge of auxiliary modules implementation for the Mixed Signal Team : Digital charger detection, LED drivers control, PWM drivers control, SPI interface, GPIOs, MIPI detection.
In charge of digital SubChip integration : RTL integration, interface with analog IPs, ECO implementation, verification support
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Texas Instruments
- Team and Project leader
Villeneuve-Loubet
1999 - 2001
Leading a team of 5 digital design engineers
Project leader for several ICs and test chips: participate to project definition, design, TOP level simulations, silicon validation and support until Release to Production
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Texas Instruments
- Digital IP design Engineer (Signal Processing)
Villeneuve-Loubet
1994 - 2006
In charge of architecture definition, implementation, simulations of
- digital filters for wireless applications: Baseband and Voiceband Codec, SINC filters, Multirate digital filters (FIR and IIR)
- digital modulators for wireless applications (GMSK, QPSK, 8PSK, EDGE)
Strongly involved in silicon validation: design issue analysis, bug fix proposal and implementation; functional TDLs deliveries
In charge of the design methodology of the Mixed signal Team : work with the complete team to build a flow (based on Cadence Analog Artist) that covers Analog and digital design, layout, RTL and Spice simulations, top level simulations
