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Synopsys
- Corporate Applications Engineer (CAE) Emulation Technology
Rungis Complexe
2015 - maintenant
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Nexvision SAS
- Senior FPGA Design Engineer
2014 - 2015
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Cadence Design Systems
- Senior FPGA design engineer
Velizy Villacoublay
2013 - 2013
Working as FPGA expert to adapt Denali PCIe Gen3 IP core on Xilinx Virtex 7 device using a softcore PCS and GTX/GTH transceivers. The goal of the project is to optimize the design to support 4 PCIe gen3 lines at 8Gbits/second connecto AXI or generic 128bits CPU interface running at 250MHz.
- Working on testing PCIe Gen3 using Cadence Palladium Emulator platform
-Debugginf the IP core and the CPU interface using Vivado ILA (former Chipscope pro) and Xilinx VIO IPs.
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PLDA
- USB 3.0 project lead
2011 - 2012
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Seema Consulting
- Senior HW design engineer
2011 - 2015
Working as a freelance HW/FPGA design engineer with focus on rapid prototyping and product development for proof of concept as well as preparing design for mass production.
- Ported a Microblaze based design into Zynq 7020 FPGA by modifying the architecture of the FPGA and the C code
- Created a general purpose board for Xilinx FMC connector to be used with the Zedboard, the board contains a camera, a touch screen LCD monitor , 2xSATA and a 24 GPIOs
- Designed an FMC board with dual ADC, dual DAC, high accuracy clock source and a GPS socket with connectors compatible with Ettus Research Radio interface board.
- Designed an FPGA based pattern generator for analog video supporting all international standards except SECAM using the Altera BeMicro USB-Key FPGA board with a small custom made board to create the analog video output.
- Designed DC motor actuator using STM32 ARM Cortex M3 based .
- Worked with GNU Radio and Ettus research USRP1 and USRP N210 HW to implement TETRA Radio Layer 1 in Python, C, C++ and VHDL. Transferred some of the DSP functionality of the GR into the Xilinx FPGA.
- Designed a low cost HW for Gnu Radio using Altera Cyclone IV FPGA and Cypress FX3 Super Speed USB 3.0 controller
- Wrote the specification and finished the schematic design of an advanced HW platform for Gnu Radio with support of Dual Core ARM Cortex A9 Tegra 2 processor, Altera Cyclone FPGA and 2x512MB DDR2 memory
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Texas Instrument
- FPGA prototype IP/Verification engineer (consultant)
Colombes
2008 - 2009
Worked in the IP verification team on TI’s OMAP4 display subsystem (DSS) IP verification on EVE’s Zebu ASIC emulator platform as well as Synopsys High-performance ASIC Prototyping System (HAPS) for real time emulation of the HDMI IP block.
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EASII IC
- Senior HW design engineer
Grenoble
2008 - 2010
Worked in a newly opened design center on customer specific projects, using Xilinx’ Embedded Development Kit (EDK) and ISE
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Texas Instrument
- HW/Sw OMAP level 2 support engineer (consultant)
Colombes
2006 - 2008
Level 2 hardware support for the Texas Instrument’s OMAP products. Working in close contact with customers in Japan, Korea, US, Sweden, Finland and India to support HW and low level SW problems with OMAP devices as well as investigating and documenting limitations and problems and finding work around for them both the device and individual IP blocks in a HW/SW co-verification environment (Modelsim, TI Code Composer, Zebu and other tools were used frequently).
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Texas Instrument
- Senior ASIC design engineer (consultant)
Colombes
2005 - 2005
Responsibility of the top-level integration of the digital part of a power management IC TRITON II
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Light storm network
- Senior ASIC design engineer
2004 - 2005
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ABB Industrial System
- Lead HW design engineer
2003 - 2004
Worked as lead HW design engineer to move ABB's R&D organization from Ohio to Ireland and built a new HW design team locally in Ireland.
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Personal
- Personal Assitance
2002 - 2003
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Tellabs Operations Inc.
- Lead Engineer Hardware design
1999 - 2002
Worked in Hawthorne with the DWDM design team on Titan series of Tellabs products.
Designed several Altera and Xilinx FPGAs for the company’s DWDM system in the range of 20-250 thousand gates. Reduced the size of an existing device by 30% and increased the speed by 20%.
As a local EDA tools support, created a standard work environment for all HW design engineers working in Unix and Windows NT and supported other members to solve their problems before calling customer support.
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Ericsson Radio Access AB
- Senior HW design engineer
1996 - 1999
I was the senior digital design engineer on a team that designed a complete Software Radio Base Station (RBS) for GSM, NMT, D-AMPS and AMPS cell-phone standards. After the working demonstration of the demo unit, I worked as internal consultant to lead a group of 25 junior engineers to take over the project.
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Tran Robotics International
- HW Design Engineer
1994 - 1996
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ABB Traction AB
- HW Design Engineer
1990 - 1994
