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David RAULT

RENNES

En résumé

Pas de description

Entreprises

  • Silicon Labs - Senior Digital Design Engineer

    2006 - maintenant Design demodulator ASICs in the domain of the channel decoding for the digital television area:
    - Forward Error Correction (FEC) architecture and design (RS, BCH, LDPC)
    - DVB-S2, DVB-S, DSS, DVB-C, MCNS, DVB-T, ATSC-T, VSB
    - VHDL, Ptolemy, Java, TCL
    - chip level synthesis and timing closure
  • Silembia formerly Embeddia - Digital Design Engineer

    2004 - 2006 Design generic customizable channel decoding IPs for the reception of the digital television (DVB-T/C/S, DVB-H, MPE-FEC).
  • Philips Semiconductors (NXP) - Digital Design Engineer

    2001 - 2004
  • Bull Information Systems - Digital Design Engineer

    Les Clayes-sous-Bois 1998 - 2001
  • LSI Logic - Digital Design Engineer

    Ariana 1996 - 1998

Formations

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