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Jean-Pierre BRIQUET

TOULOUSE

Electionseuropéennes 2024

RETROUVEZ GRATUITEMENTLe résultat des européennes à Toulouse ainsi que le résultat des européennes en Haute-Garonne.

En résumé

Je suis quelqu'un de nature curieuse, ouvert d'esprit et consciencieux . Ces qualités me permettent d'aborder un problème complexe avec une démarche d'innovation et de réalisme.

Fort de deux expériences dans l'industrie, j'ai appris à travailler en équipe, respecter les délais et coûts qui nous sont alloués. J'ai compris que les performances d'une entreprise dépendent essentiellement de l'efficacité du travail de l'ensemble de ses employés.

J'aime faire partager ma passion pour les sciences et les nouvelles technologies, et je le fais grâce à l'encadrement de projets scientifiques dans un collège.
Ce que je dégage de cette expérience, c'est la capacité de faire comprendre un phénomène ou un problème complexe de façon simple.


Mes compétences :
C++
VHDL FPGA et Matlab
Microsoft office
Management de projet
Spice
Électronique analogique
Spatial
Ingénieur
Aéronautique
Électronique numérique
Industrie
Électronique
OpenCL
Automobile
Téléphonie mobile
Verilog
Systemverilog
Verilog ams
System c
Cadence
Python

Entreprises

  • Freescale toulouse - Mixed signal design engineer (intern)

    2014 - maintenant Mixed-signal Virtual Prototype of an automotive Battery Monitoring System (BMS) IC
    •Translation flow on a BMS-lite project
    -Translated digital RTL into systemC/C++ using Verilator
    -Developed scripts to automate the translation flow
    -Developed SystemC behavior models for analog blocks
    -Validated the virtual prototype on a SystemVerilog/SystemC Test bench
    •Apply the translation flow on the actual BMS IC
    Achievements
    •Mixed-signal Design Verification
    -Developed simple models in Verilog-AMS
    -Interfaced C++ models using SystemVerilog DPI
    -Automated simulation and code generation flow using python and shell scripts
    •Working knowledge of Cadence Incisive
    -Performed mixed-signal simulations using Irun
    -Developed simulation scripts from scratch

  • National Tsing Hua University - Parallel Computing Internship

    2013 - maintenant The purpose of this internship was to introduce me parallel computing. Furthermore, NTHU is involving in HSA Foundation, then this partnership allowed me to get the HSA background.
    HSA Foundation which is a consortium of SoC IP vendors, OEMs, academia, SoC vendors, OSVs and ISVs whose challenging the normal of how whole system architecture is structured for combing CPU’s, GPU’s, DSP’s.
    (HSA: Heterogeneous System Architecture)

    My work was divided into 4 parts:

    • Getting information about Parallel Computing and OpenCL .
    Reading AMD Accelerated Parallel Processing paper, and others documents can help me to understand the HSA overview.
    •Developing two OpenCL programs using parallelization : matrix Transpose and Mandelbrot Set
    •Translating the previous programs into HSAIL ( Heterogeneous System Architecture Intermediate Language)
    •Testing OpenCL programs on NTHU's server which is equipped with NVIDIA Kepler GPU, and testing HSAIL programs on Qemu emulator (modified by the Lab)

  • Getelec électricité guadeloupe - Electrical Worker

    2012 - 2012 Worked in a 50 people's society of electricity, I integrated a team of 3 qualified electricians, several tasks were affected to my team as laying cable, installation of electrical box, and more. This experience showed me several electrical applications, but I also learnt a lot of about working conditions and workers' demands.

  • Restaurant le pitaya - Kitchen porter

    2010 - 2010

  • SGCO (société guadeloupéenne de carton ondulé) - Worker

    2009 - 2009 Worked in a team of 30 people, Cardboard Factory of Guadeloupe.
    This experience taught me how to work quickly and efficiency under pressure

Formations

  • Institut National Polytechnique (ENSEEIHT)

    Toulouse 2011 - 2014 Master Degree

    Electronics Engineering -Top Ranking French Engineering Institute - Courses included

    • Digital electronic (VHDL, FPGA)
    • Analogical electronic, designing on Pspice
    • Electromagnetic, antennas (ADS)
    • Signal processing
    • Management

    Projects

    • Design, simulation and implementation of a voltage amplifier (duration 2 months)
    • Design, simulation and implementation of electronics circuits associa

  • Lycée Riviere Des Peres

    Basse Terre 2008 - 2008 Baccalauréat STI mention Bien

  • Lycée La Fayette

    Clermont Ferrand 2008 - 2011 Pre-Engineering

    Three-­‐year intensive undergraduate course to prepare for competitive entrance to French engineering Schools

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