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IRT B-Com
- Senior Hardware Engineer
2015 - maintenant
- Setting up FPGA/ASIC design process and guidelines
- FPGA development (Xilinx/Altera)
- IPs design (VHDL)
- Digital signal processing
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Advanten
- R&D Engineer
Cesson-Sévigné
2014 - 2015
- FPGA development (Altera)
- Digital signal processing
- DDR3 memory evaluation
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Renesas Mobile Corporation
- R&D Engineer
2012 - 2014
RFIC digital design engineer
Triple mode RF transceivers (2G/3G/LTE) digital design:
- Hardware architecture specifications
- IPs design (Verilog)
- Test software (C)
- Integration (top test bench, scripts, makefile)
- Validation (code coverage, quality checks, gate level simulation, board tests)
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Renesas Design France
- LSI Design Engineer
2009 - 2012
Néo-Soft Engineer working as an LSI Designer at Renesas Design France.
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Renesas Design France
- LSI Design Engineer
2008 - 2008
Néo-Soft Engineer working as an LSI Designer at Renesas Design France, Hardware department, LSI group.
-ASIC prototyping on FPGA
-Trace Logger Board
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TeamCast
- R&D engineer
Vandœuvre-lès-Nancy
2008 - 2008
Néo-Soft Engineer working as an Hardware designer at TeamCast.
-Matlab study and FPGA implementation of digital TV broadcasting standards for mobile devices.
-CMMB (China Multimedia Mobile Broadcasting) modulator implementation on FPGA
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Alcatel-Lucent
- Hardware Designer Trainee at Alcatel-Lucent
Paris
2007 - 2007
Alcatel-Lucent Convergence Multicore, Cesson-Sévigné, France
Media Gateway – Hardware Lab
Media Gateway 7570 and telecom norms study. G.729 (VoIP) algorithm study.
Design of a G.711/G.729 transcoder in VHDL on FPGA (virtex5) for an IP communication board.
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Néo-Soft
- Consulting R&D engineer
Paris
2007 - 2012
Ingénieur d'études, Systèmes Embarqués
- FPGA & ASIC Design
- Embedded Linux
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Thomson R&D
- Engineer trainee
2006 - 2006
Thomson R&D Access Plateforms & Gateways, Rennes, France
Core Development Group Hardware Lab
Study of hardware characterization and validation tests for satellites and cable Set Top Boxes.
Feasibility study and design of an automated test bench with NI Labwindows/CVI.
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Thomson R&D France
- Engineer trainee
2005 - 2005
Corporate Research, Network Lab
Electronics boards and integrated circuits testing.
